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| IN74HCT132A QUAD 2-INPUT NAND GATE WITH SCHMITT-TRIGGER INPUTS High-Performance Silicon-Gate CMOS The IN74HCT132A is identical in pinout to the LS/ALS132. The IN74HCT132A may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. * TTL/NMOS Compatible Input Levels * Outputs Directly Interface to CMOS, NMOS, and TTL * Operating Voltage Range: 4.5 to 5.5 V * Low Input Current: 1.0 A ORDERING INFORMATION IN74HCT132AN Plastic IN74HCT132AD SOIC TA = -55 to 125 C for all packages LOGIC DIAGRAM PIN ASSIGNMENT PIN 14 =VCC PIN 7 = GND FUNCTION TABLE Inputs Output A B Y L L H L H H H L H H H L 1 IN74HCT132A MAXIMUM RATINGS* Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V VIN DC Input Voltage (Referenced to GND) -1.5 to VCC +1.5 V VOUT DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V IIN DC Input Current, per Pin mA 20 IOUT DC Output Current, per Pin mA 25 ICC DC Supply Current, VCC and GND Pins mA 50 PD Power Dissipation in Still Air, Plastic DIP+ 750 mW SOIC Package+ 500 Tstg Storage Temperature -65 to +150 C 260 TL Lead Temperature, 1 mm from Case for 10 C Seconds (Plastic DIP or SOIC Package) * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/C from 65 to 125C SOIC Package: : - 7 mW/C from 65 to 125C RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC DC Supply Voltage (Referenced to GND) VIN, VOUT DC Input Voltage, Output Voltage (Referenced to GND) TA Operating Temperature, All Package Types t r, tf Input Rise and Fall Time (Figure 1) * Min 4.5 0 -55 - Max 5.5 VCC +125 no limit* Unit V V C ns When VIN 0.5VCC, ICC> > quiescent current. This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 IN74HCT132A DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND) Guaranteed Limit VCC Symbol Parameter Test Conditions V 25 C 85 125 to C C 55C VT+max Maximum Positive- VOUT=0.1 V 4.5 1.9 1.9 1.9 Going Input IOUT 20 A 5.5 2.1 2.1 2.1 Threshold Voltage VT+min Minimum Positive- VOUT=0.1 V 4.5 1.2 1.2 1.2 Going Input IOUT 20 A 5.5 1.4 1.4 1.4 Threshold Voltage VOUT=VCC-0.1 VT-max Maximum V 4.5 1.2 1.2 1.2 Negative-Going 5.5 1.4 1.4 1.4 IOUT 20 A Input Threshold Voltage VT-min Minimum Negative- VOUT=VCC-0.1 V 4.5 0.5 0.5 0.5 Going Input IOUT 20 A 5.5 0.6 0.6 0.6 Threshold Voltage 1.4 1.4 1.4 VHmax Maximum VOUT=0.1 V or VCC-0.1 4.5 5.5 1.5 1.5 1.5 Note Hysteresis Voltage V IOUT 20 A 0.4 0.4 0.4 VHmin Minimum VOUT=0.1 V or VCC-0.1 4.5 5.5 0.4 0.4 0.4 Note Hysteresis Voltage V IOUT 20 A 4.4 4.4 4.4 VOH Minimum High- VINVT-min or VT+max 4.5 5.5 5.4 5.4 5.4 Level Output Iout 20 A Voltage VINVT-min or VT+max 3.7 3.98 3.8 IOUT 4.0 mA 4.5 4 IOUT 5.2 mA VOL Maximum Low- VIN 0.1 0.1 0.1 VT+max 4.5 Level Output IOUT 20 A 5.5 0.1 0.1 0.1 Voltage VT+max VIN 0.4 0.26 0.3 IOUT 4.0 mA 4.5 3 IOUT 5.2 mA IIN Maximum Input VIN=VCC or GND 5.5 0.1 1. 1.0 Leakage Current 0 VIN=VCC ICC Maximum or GND 5.5 1.0 10 40 Quiescent Supply IOUT=0A Current (per Package) VIN = 2.4 V, Any One Additional -55C 25C to ICC Quiescent Supply Input 125C VIN=VCC or GND, Other Current Inputs 5.5 2.9 2.4 IOUT=0A Note. VHmin>(VT+min)-(VT-max); VHmax=(VT+max)+(VT-min). Uni t V V V V V V V V A A mA 3 IN74HCT132A AC ELECTRICAL CHARACTERISTICS(VCC=5.0 V 10%, CL=50pF,Input tr=tf=6.0 ns) Guaranteed Limit Unit Symbol Parameter 25 C 85C 125 to C -55C tPLH, Maximum Propagation Delay, Input A or 25 31 38 ns tPHL B to Output Y (Figures 1 and 2) 15 19 22 ns tTLH, tTHL Maximum Output Transition Time, Any Output (Figures 1 and 2) CIN Maximum Input Capacitance 10 10 10 pF Power Dissipation Capacitance (Per Gate) Used to determine the no-load dynamic power consumption: PD=CPDVCC2f+ICCVCC Typical @25C,VCC=5.0 V 27 CPD pF 4 IN74HCT132A 5 IN74HCT132A Figure 1. Switching Waveforms Figure 2. Test Circuit 6 |
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